Inclusive & Assistive Products
ISDN2001/2002: Second Year Design Project
Independent Study
Optimising circuit efficiency through PCB design for small form factor devices
Research Objective & Context
This research will investigate the impact of component layout and trace dimensions on the overall circuit efficiency for small form factor devices. Reducing power inefficiency whilst maintaining signal integrity and overall performance, the study aims to optimise the PCB design and minimise the size.
Outcome of this research is to be implemented in our product.
Parameters
This research aims to investigate:
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The relationship between component layout and power dissipation to minimise heating
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The relationship between trace width, length, and thickness to minimise resistance but preserve signal integrity
Methodology
This research adopts a hybrid simulation and physical testing approach. PCB design software like KiCad and Autodesk Fusion are used to alter component layout and to simulate signal integrity, and power dissipation. A standard circuit and PCB design serve as control variables. The circuits undergo evaluation based on overall power consumption and dissipation.
Trace dimensions are tested using fabricated PCBs and physical testing. Each parameter for trace dimensions is printed onto a PCB, which is powered, and the output measured.
Process
Test 1
Solder Breadboard
Test 2
Custom PCB 1
This study begins with prototyping the circuit on a solder breadboard. The circuit is then tested and the dependent variables measured. This circuit is the control circuit and will act as a benchmark for performance and all future tests will be compared to it.
The performance is on the less efficient side compared to the expected performance from the datasheet of the MCU and the CFD - most likely due to hardware tolerances. However, it is within specification, so it is an acceptable benchmark.
This PCB is designed to have a higher component density than the control circuit. Components are placed on average closer to each other, and the overall PCB size is also reduced. Trace parameters have also been reduced to the minimum dimensions that allow the circuit to still function normally.
The PCB is first simulated in KiCad to ensure it passes all electrical and signal checks. The PCB is then exported into Autodesk Fusion to run a CFD heatmap analysis to illustrate the expected power dissipation.
After fabricating the PCB, it repeats the electrical tests like previously and a thermal image is also taken during peak performance.
It is found that the PCB performs sligh better than the control circuit electrically, but the power dissipation is higher than expected.
Test 3
Custom PCB 2
The next PCB is designed to test a lower component density than the control circuit. Components are placed on average further appart and the overall PCB size is marginally increased. Trace parameters have been increased for power traces as they were observed to dissipate more power than signal traces.
Like previously, the PCB is first simulated in KiCad and then exported into Autodesk Fusion to run a CFD heatmap analysis.
After fabricating the PCB, it repeats the electrical tests and a thermal image is also taken.
It is found that the PCB performs noticably better than both the control circuit and the previous test PCB electrically, and the power dissipation is also significantly reduced.
Outcome
This study concludes that component layout has the greatest overall effect on circuit efficiency, whereas trace parameters are only significant in specific scenarios.
Hence, small form factor PCBs in compact environments should prioritise component layout, then alter trace parameters to maximise overall performance efficiency.